A simple matrix-type liquid crystal display (LCD) unit having a plurality of striping row electrodes (common electrodes) and a plurality of column electrodes (segment electrode) that perpendicularly intersect the common electrodes is widely used as a means for displaying dot information on the LCD unit.
Such LCD unit is driven by a scanning voltage sequentially applied to the respective common electrodes thereof and a signal voltage applied to a multiplicity of segment electrodes simultaneously with the scanning voltage.
Each liquid crystal element is controlled to have a transmissivity determined by the effective scanning voltage, that is defined to be the average of the scanning voltages applied to each of the row electrodes once in one frame period. One frame of a desired image amounts to scanning over 1 frame period. This scanning enables displaying one picture frame of a desired image.
FIG. 15 shows a circuit diagram of a conventional electric power unit for driving an LCD unit. As shown in FIG. 15, the electric power unit generates, from a given power supply voltage Vcc (typically 3 V), a first output voltage V0 (15 V), a second output voltage V1 (13.5 V), a third output voltage V2 (12 V), a fourth output voltage V3 (3 V), a fifth output voltage V4 (1.5 V), and a sixth voltage V5 (e.g. 0 V or ground potential) serving as a reference voltage, and supplies them to the LCD unit. In what follows, voltages are referenced to the ground potential unless otherwise stated. The LCD unit includes a display panel, a common driver for sequentially scanning the common electrodes, and a segment driver for applying a signal voltage to the segment electrodes in synchronism with the scanning of the common electrodes.
A charge pump circuit CHP0 is supplied with the power supply voltage Vcc and a clock signal clk to generate at the output end thereof a supply voltage (hereinafter referred to as output supply voltage) Vout0 (18 V) by stepping up the power supply voltage Vcc to 6Vcc. A smoothing capacitor C0 is connected to the charge pump circuit CHP0.
The output voltage Vout0 of the power unit is supplied to a voltage amplifier A1 that amplifies a reference voltage Vref (2 V) n times (n=7.5) to form a first reference voltage V0r (15 V). The first reference voltage V0r is divided by resistors R0-R4 to generate a second reference voltage V1r (13.5 V), a third reference voltage V2r (12 V), a fourth reference voltage V3r (3 V), and a fifth reference voltage V4r (1.5 V).
The first through fifth reference voltages V0r-Vr4, respectively, are supplied to the first through fifth buffer circuit B0-B4, respectively, operating at the output voltage Vout0 and a first through a fifth output voltages V0-V4, respectively, having the same voltage as the respective reference voltages are outputted therefrom. The sixth voltage V5 is the ground potential.
Of the first through sixth output voltage V0-V5, respectively, the first, second, fifth and sixth output voltages V0, V1, V4, and V5, respectively, are supplied to the common driver, while the first, third, fourth and sixth output voltages V0, V2, V3, and V5, respectively, are supplied to the segment driver of the LCD panel. These voltages are selectively supplied in synchronism with the period of the LCD in alternating cycle. In what follows the operation of the power unit will be described for one period of the frame cycle of the LCD unit.
FIG. 16 shows waveforms of drive voltages applied to a specific common electrode COMj and segment electrode SEGk of the LCD panel having n common electrodes and m segment electrodes.
In odd frames, common electrodes COM1-COMn are sequentially scanned to sequentially select one common electrode COMj at a time, to which the first output voltage V0 is applied. Those common electrodes COM1-COMn not selected (excluding COMj) are supplied with the fifth output voltage V4. On the other hand, segment electrodes SEG1-SEGm are supplied with the fourth output voltage V3 or the sixth voltage V5 in accordance with the display signal associated with the common electrode selected.
In even frames, common electrodes COM1-COMn are sequentially scanned to select one common electrode COMj at a time, to which the sixth voltage V5 is supplied. Those common electrodes COM1-COMn not selected are supplied with the second output voltage V1. On the other hand, segment electrodes SEG1-SEGm are supplied with the first output voltage V0 or the third output voltage V2 in accord with the display signal associated with the selected common electrode.
Thus, under the alternating control of the common and segment electrodes, a picture associated with a given display signal is displayed on the LCD panel.
In this case, the buffer circuit B3 and B4 are energized by the voltage between the output power supply voltage Vout0 and the sixth voltage V5 (ground potential). As a consequence, the power P consumed in driving the LCD panel is given byP=Vout0×Ioutwhere Iout is the current provided to the LCD elements during charging and discharging thereof. Consequently, the power consumed by the LCD panel increases in proportion to the voltage Vout0 as the step-up multiplication factor of the charge pump circuit CHP0 increased (the multiplication factor of the CHP0 shown in FIG. 15 is 6).
On the other hand, unselected LCD pixels require a voltage as small as first through third output voltages V0-V2 or fourth through sixth output voltages V3-V5 in one frame of the alternating cycles even when the step-up multiplication factor is high as shown in FIG. 16. To take advantage of alternating driving of such LCD panel, not only the final output power supply voltage of the step-up circuit, intermediate step-up voltages appearing in the intermediate stages of the step-up circuit (such as a charge pump circuit and Cockcroft-Walton circuit) may be extracted for use as supply voltages (referred to as output supply voltages). For example, Japanese Patent Applications Laid Open JPA-2001-75536 and JPA-2001-4976 (documents 1 and 2) disclose step-up circuits adapted to utilize intermediate step-up voltages for minimization of the power consumption by a display panel in addition to the final output power supply voltage of the circuit.
However, in order to allow extraction of final and intermediate step-up voltages, the prior art step-up circuits of the cited references 1 and 2 are composed of multi-stage step-up units connected in series. In this arrangement, however, it is difficult to properly set up intermediate set-up voltages as required by a given display panel. Further, if the required intermediate voltages were set up in the step-up circuit, the levels of extracted voltages would fluctuate, so that it is still difficult to obtain the voltages correctly. Moreover, intermediate step-up stages could fail proper absorption of currents.